added my Recipes
This commit is contained in:
@@ -0,0 +1,44 @@
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From 2c777126765b4095bf481d5cfe4a21470374d940 Mon Sep 17 00:00:00 2001
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From: Khem Raj <raj.khem@gmail.com>
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Date: Tue, 30 Mar 2021 15:12:09 -0700
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Subject: [PATCH] flashrom: Mark RISCV as non memory-mapped I/O architecture
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Upstream-Status: Submitted [https://review.coreboot.org/c/flashrom/+/51960]
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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Change-Id: I55c4e8529d36f0850dd56441c3fb8602c5d889fd
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---
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Makefile | 2 +-
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hwaccess.h | 4 ++++
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2 files changed, 5 insertions(+), 1 deletion(-)
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diff --git a/Makefile b/Makefile
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index 6d37d55..203e04b 100644
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--- a/Makefile
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+++ b/Makefile
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@@ -559,7 +559,7 @@ endif
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# Disable all drivers needing raw access (memory, PCI, port I/O) on
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# architectures with unknown raw access properties.
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# Right now those architectures are alpha hppa m68k sh s390
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-ifneq ($(ARCH),$(filter $(ARCH),x86 mips ppc arm sparc arc))
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+ifneq ($(ARCH),$(filter $(ARCH),x86 mips ppc arm sparc arc riscv))
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ifeq ($(CONFIG_RAYER_SPI), yes)
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UNSUPPORTED_FEATURES += CONFIG_RAYER_SPI=yes
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else
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diff --git a/hwaccess.h b/hwaccess.h
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index 5602c15..e79988a 100644
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--- a/hwaccess.h
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+++ b/hwaccess.h
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@@ -295,6 +295,10 @@ int libpayload_wrmsr(int addr, msr_t msr);
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/* Non memory mapped I/O is not supported on ARC. */
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+#elif IS_RISCV
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+
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+/* Non memory mapped I/O is not supported on RISCV. */
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+
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#else
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#error Unknown architecture, please check if it supports PCI port IO.
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--
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2.31.1
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@@ -0,0 +1,52 @@
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From 3334dd4e9fc34c79c3925c3c24869939d8955f21 Mon Sep 17 00:00:00 2001
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From: Rosen Penev <rosenp@gmail.com>
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Date: Sat, 18 Jul 2020 12:16:00 -0700
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Subject: [PATCH] hwaccess: use __asm__ as is done elsewhere
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Fixes compilation under powerpc platform. Made the change for the SPARC
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platform as well.
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../hwaccess.c: In function 'sync_primitive':
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../hwaccess.c:74:2: warning: implicit declaration of function 'asm'
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[-Wimplicit-function-declaration]
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74 | asm("eieio" : : : "memory");
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| ^~~
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../hwaccess.c:74:13: error: expected ')' before ':' token
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74 | asm("eieio" : : : "memory");
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Upstream-Status: Submitted [https://github.com/flashrom/flashrom/pull/155]
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Signed-off-by: Rosen Penev <rosenp@gmail.com>
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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---
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hwaccess.c | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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diff --git a/hwaccess.c b/hwaccess.c
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index 48ccb34..2a39989 100644
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--- a/hwaccess.c
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+++ b/hwaccess.c
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@@ -71,18 +71,18 @@ static inline void sync_primitive(void)
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* See also https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/memory-barriers.txt
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*/
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#if IS_PPC // cf. http://lxr.free-electrons.com/source/arch/powerpc/include/asm/barrier.h
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- asm("eieio" : : : "memory");
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+ __asm__ ("eieio" : : : "memory");
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#elif IS_SPARC
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#if defined(__sparc_v9__) || defined(__sparcv9)
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/* Sparc V9 CPUs support three different memory orderings that range from x86-like TSO to PowerPC-like
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* RMO. The modes can be switched at runtime thus to make sure we maintain the right order of access we
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* use the strongest hardware memory barriers that exist on Sparc V9. */
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- asm volatile ("membar #Sync" ::: "memory");
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+ __asm__ volatile ("membar #Sync" ::: "memory");
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#elif defined(__sparc_v8__) || defined(__sparcv8)
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/* On SPARC V8 there is no RMO just PSO and that does not apply to I/O accesses... but if V8 code is run
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* on V9 CPUs it might apply... or not... we issue a write barrier anyway. That's the most suitable
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* operation in the V8 instruction set anyway. If you know better then please tell us. */
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- asm volatile ("stbar");
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+ __asm__ volatile ("stbar");
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#else
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#error Unknown and/or unsupported SPARC instruction set version detected.
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#endif
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--
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2.32.0
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@@ -0,0 +1,68 @@
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Add a ftdi option alongside USB and PCI to control the external dependency, and
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ensure that the build is successful in all combinations of options.
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Upstream-Status: Pending
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Signed-off-by: Ross Burton <ross.burton@arm.com>
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diff --git a/meson.build b/meson.build
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index 375089c..0df9d69 100644
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--- a/meson.build
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+++ b/meson.build
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@@ -91,6 +91,8 @@ else
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config_digilent_spi = false
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config_developerbox_spi = false
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config_pickit2_spi = false
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+ config_stlinkv3_spi = false
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+ config_usbblaster_spi = false
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endif
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# some programmers require libpci
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@@ -118,6 +120,21 @@ else
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config_satasii = false
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endif
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+# some programmers require libftdi
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+if get_option('ftdi')
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+ deps += dependency('libftdi1')
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+else
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+ config_ft2232_spi = false
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+ config_usbblaster_spi = false
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+endif
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+
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+if not (target_machine.cpu_family() == 'x86' or target_machine.cpu_family() == 'x86_64')
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+ config_satamv = false
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+ config_nic3com = false
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+ config_rayer_spi = false
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+ config_nicrealtek = false
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+endif
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+
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# set defines for configured programmers
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if config_atahpt
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srcs += 'atahpt.c'
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@@ -163,7 +180,6 @@ endif
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if config_ft2232_spi
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srcs += 'ft2232_spi.c'
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cargs += '-DCONFIG_FT2232_SPI=1'
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- deps += dependency('libftdi1')
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cargs += '-DHAVE_FT232H=1'
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endif
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if config_gfxnvidia
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@@ -216,6 +232,7 @@ endif
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if config_nicintel
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srcs += 'nicintel.c'
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cargs += '-DCONFIG_NICINTEL=1'
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+ need_raw_access = true
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endif
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if config_nicintel_eeprom
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srcs += 'nicintel_eeprom.c'
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diff --git a/meson_options.txt b/meson_options.txt
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index ea87311..b6b842d 100644
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--- a/meson_options.txt
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+++ b/meson_options.txt
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@@ -1,5 +1,6 @@
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option('pciutils', type : 'boolean', value : true, description : 'use pciutils')
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option('usb', type : 'boolean', value : true, description : 'use libusb1')
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+option('ftdi', type : 'boolean', value : true, description : 'use libftdi')
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option('config_atahpt', type : 'boolean', value : false, description : 'Highpoint (HPT) ATA/RAID controllers')
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option('config_atapromise', type : 'boolean', value : false, description : 'Promise ATA controller')
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@@ -0,0 +1,20 @@
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DESCRIPTION = "flashrom is a utility for identifying, reading, writing, verifying and erasing flash chips"
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LICENSE = "GPL-2.0-or-later"
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HOMEPAGE = "http://flashrom.org"
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LIC_FILES_CHKSUM = "file://COPYING;md5=751419260aa954499f7abaabaa882bbe"
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SRC_URI = "https://download.flashrom.org/releases/flashrom-v${PV}.tar.bz2 \
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file://meson-fixes.patch \
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file://0001-flashrom-Mark-RISCV-as-non-memory-mapped-I-O-archite.patch \
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file://0001-hwaccess-use-__asm__-as-is-done-elsewhere.patch \
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"
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SRC_URI[sha256sum] = "89a7ff5beb08c89b8795bbd253a51b9453547a864c31793302296b56bbc56d65"
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S = "${WORKDIR}/flashrom-v${PV}"
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inherit meson pkgconfig
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PACKAGECONFIG ??= "pci usb ftdi"
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PACKAGECONFIG[pci] = "-Dpciutils=true,-Dpciutils=false,pciutils"
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PACKAGECONFIG[usb] = "-Dusb=true,-Dusb=false,libusb"
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PACKAGECONFIG[ftdi] = "-Dftdi=true,-Dftdi=false,libftdi"
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