// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*
 * Copyright (C) 2024, STMicroelectronics - All Rights Reserved
 * Author: STM32CubeMX code generation for STMicroelectronics.
 */

/* For more information on Device Tree configuration, please refer to
 * https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration
 */

/dts-v1/;
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
#include <dt-bindings/clock/stm32mp1-clksrc.h>
#include "stm32mp15-mx.dtsi"

#include "stm32mp157.dtsi"
#include "stm32mp15xd.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include "stm32mp15-ddr.dtsi"

/* USER CODE BEGIN includes */
/* USER CODE END includes */

/ {
	model = "STMicroelectronics STM32MP157D-DK1 STM32CubeMX board - openstlinux-6.1-yocto-mickledore-mp1-v23.06.21";
	compatible = "st,stm32mp157d-vrpmdv-mon-mx", "st,stm32mp157d-dk1", "st,stm32mp157";

	memory@c0000000 {
		device_type = "memory";
		reg = <0xc0000000 0x20000000>;

		/* USER CODE BEGIN memory */
		/* USER CODE END memory */
	};

	/* USER CODE BEGIN root */

	vin:vin{
		compatible = "regulator-fixed";
		regulator-name = "vin";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	aliases{
		serial0 = &uart4;
		serial1 = &usart3;
		serial2 = &uart7;
	};

	chosen{
		stdout-path = "serial0:115200n8";
	};
	/* USER CODE END root */

	clocks {
		/* USER CODE BEGIN clocks */
		/* USER CODE END clocks */

		clk_hsi: clk-hsi {
			clock-frequency = <64000000>;

			/* USER CODE BEGIN clk_hsi */
			/* USER CODE END clk_hsi */
		};
		clk_lse: clk-lse {
			clock-frequency = <32768>;
			st,drive = < LSEDRV_MEDIUM_HIGH >;

			/* USER CODE BEGIN clk_lse */
			/* USER CODE END clk_lse */
		};
		clk_hse: clk-hse {
			clock-frequency = <24000000>;
			st,digbypass;

			/* USER CODE BEGIN clk_hse */
			/* USER CODE END clk_hse */
		};
	};

}; /*root*/

&pinctrl {
	sdmmc1_pins_mx: sdmmc1_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
					 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
					 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
					 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
					 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
	};

	uart4_pins_mx: uart4_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
			bias-disable;
		};
		pins2 {
			pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	/* USER CODE BEGIN pinctrl */
	/* USER CODE END pinctrl */
};

&pinctrl_z {
	i2c4_pins_z_mx: i2c4_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
					 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	/* USER CODE BEGIN pinctrl_z */
	/* USER CODE END pinctrl_z */
};

&hash1{
	status = "okay";

	/* USER CODE BEGIN hash1 */
	/* USER CODE END hash1 */
};

&i2c4{
	pinctrl-names = "default";
	pinctrl-0 = <&i2c4_pins_z_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c4 */
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	clock-frequency = <400000>;

	pmic:stpmic@33{
		compatible = "st,stpmic1";
		reg = <0x33>;
		interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
		status = "okay";

		regulators{
			compatible = "st,stpmic1-regulators";
			buck1-supply = <&vin>;
			buck2-supply = <&vin>;
			buck3-supply = <&vin>;
			buck4-supply = <&vin>;
			ldo1-supply = <&v3v3>;
			ldo2-supply = <&vin>;
			ldo3-supply = <&vdd_ddr>;
			ldo4-supply = <&vin>;
			ldo5-supply = <&vin>;
			ldo6-supply = <&v3v3>;
			vref_ddr-supply = <&vin>;
			boost-supply = <&vin>;
			pwr_sw1-supply = <&bst_out>;
			pwr_sw2-supply = <&bst_out>;

			vddcore:buck1{
				regulator-name = "vddcore";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1350000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			vdd_ddr:buck2{
				regulator-name = "vdd_ddr";
				regulator-min-microvolt = <1350000>;
				regulator-max-microvolt = <1350000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			vdd:buck3{
				regulator-name = "vdd";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				st,mask-reset;
				regulator-initial-mode = <0>;
				regulator-over-current-protection;
			};

			v3v3:buck4{
				regulator-name = "v3v3";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				regulator-over-current-protection;
				regulator-initial-mode = <0>;
			};

			v1v8_audio:ldo1{
				regulator-name = "v1v8_audio";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			v3v3_hdmi:ldo2{
				regulator-name = "v3v3_hdmi";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vtt_ddr:ldo3{
				regulator-name = "vtt_ddr";
				regulator-always-on;
				regulator-over-current-protection;
				st,regulator-sink-source;
			};

			vdd_usb:ldo4{
				regulator-name = "vdd_usb";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
			};

			vdda:ldo5{
				regulator-name = "vdda";
				regulator-min-microvolt = <2900000>;
				regulator-max-microvolt = <2900000>;
				regulator-boot-on;
			};

			v1v2_hdmi:ldo6{
				regulator-name = "v1v2_hdmi";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-always-on;
			};

			vref_ddr:vref_ddr{
				regulator-name = "vref_ddr";
				regulator-always-on;
			};

			bst_out:boost{
				regulator-name = "bst_out";
			};

			vbus_otg:pwr_sw1{
				regulator-name = "vbus_otg";
			};

			vbus_sw:pwr_sw2{
				regulator-name = "vbus_sw";
				regulator-active-discharge = <1>;
			};
		};
	};
	/* USER CODE END i2c4 */
};

&iwdg1{
	status = "okay";

	/* USER CODE BEGIN iwdg1 */
	timeout-sec = <32>;
	/* USER CODE END iwdg1 */
};

&rcc{
	status = "okay";

	/* USER CODE BEGIN rcc */
	compatible = "st,stm32mp1-rcc-secure", "st,stm32mp1-rcc", "syscon";
	/* USER CODE END rcc */

	st,clksrc = <
		CLK_CKPER_HSE
		CLK_SDMMC12_PLL4P
		CLK_STGEN_HSE
		CLK_I2C46_HSI
		CLK_USBO_USBPHY
		CLK_UART24_HSI
		CLK_MPU_PLL1P
		CLK_AXI_PLL2P
		CLK_MCU_PLL3P
	>;
	st,clkdiv = <
		DIV(DIV_MPU, 1)
		DIV(DIV_AXI, 0)
		DIV(DIV_MCU, 0)
		DIV(DIV_APB1, 1)
		DIV(DIV_APB2, 1)
		DIV(DIV_APB3, 1)
		DIV(DIV_APB4, 1)
		DIV(DIV_APB5, 2)
		DIV(DIV_RTC, 23)
		DIV(DIV_MCO1, 0)
		DIV(DIV_MCO2, 0)
	>;
	st,pll_vco {
		pll2_vco_1066Mhz: pll2-vco-1066Mhz {
			src = < CLK_PLL12_HSE >;
			divmn = < 2 65 >;
			frac = < 0x1400 >;
		};
		pll3_vco_417Mhz: pll3-vco-417Mhz {
			src = < CLK_PLL3_HSE >;
			divmn = < 1 33 >;
			frac = < 0x1a04 >;
		};
		pll4_vco_594Mhz: pll4-vco-594Mhz {
			src = < CLK_PLL4_HSE >;
			divmn = < 3 98 >;
		};
		/* USER CODE BEGIN rcc_st-pll_vco */

		pll1_vco_1300Mhz:pll1-vco-1300Mhz{
			src = < CLK_PLL12_HSE >;
			divmn = < 2 80 >;
			frac = < 0x800 >;
		};

		pll3_vco_417_8Mhz:pll3-vco-417_8Mhz{
			src = < CLK_PLL3_HSE >;
			divmn = < 1 33 >;
			frac = < 0x1a04 >;
		};
		/* USER CODE END rcc_st-pll_vco */
	};

	pll2:st,pll@1 {
		compatible = "st,stm32mp1-pll";
		reg = <1>;

		st,pll = < &pll2_cfg1 >;

		pll2_cfg1: pll2_cfg1 {
			st,pll_vco = < &pll2_vco_1066Mhz >;
			st,pll_div_pqr = < 1 0 0 >;
		};
		/* USER CODE BEGIN pll2 */
		/* USER CODE END pll2 */
	};

	pll3:st,pll@2 {
		compatible = "st,stm32mp1-pll";
		reg = <2>;

		st,pll = < &pll3_cfg1 >;

		pll3_cfg1: pll3_cfg1 {
			st,pll_vco = < &pll3_vco_417Mhz >;
			st,pll_div_pqr = < 1 16 36 >;
		};
		/* USER CODE BEGIN pll3 */
		/* USER CODE END pll3 */
	};

	pll4:st,pll@3 {
		compatible = "st,stm32mp1-pll";
		reg = <3>;

		st,pll = < &pll4_cfg1 >;

		pll4_cfg1: pll4_cfg1 {
			st,pll_vco = < &pll4_vco_594Mhz >;
			st,pll_div_pqr = < 5 7 7 >;
		};
		/* USER CODE BEGIN pll4 */
		/* USER CODE END pll4 */
	};

};

&sdmmc1{
	pinctrl-names = "default";
	pinctrl-0 = <&sdmmc1_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN sdmmc1 */
	disable-wp;
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&v3v3>;
	/* USER CODE END sdmmc1 */
};

&uart4{
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN uart4 */
	/* USER CODE END uart4 */
};

&usbotg_hs{
	status = "okay";

	/* USER CODE BEGIN usbotg_hs */
	phys = <&usbphyc_port1 0>;
	phy-names = "usb2-phy";
	usb-role-switch;
	/* USER CODE END usbotg_hs */
};

&usbphyc{
	status = "okay";

	/* USER CODE BEGIN usbphyc */
	/* USER CODE END usbphyc */
};

&usbphyc_port0{
	status = "okay";

	/* USER CODE BEGIN usbphyc_port0 */
	phy-supply = <&vdd_usb>;
	/* USER CODE END usbphyc_port0 */
};

&usbphyc_port1{
	status = "okay";

	/* USER CODE BEGIN usbphyc_port1 */
	phy-supply = <&vdd_usb>;
	/* USER CODE END usbphyc_port1 */
};

/* USER CODE BEGIN addons */

&bsec{

	board_id:board_id@ec{
		reg = <0xec 0x4>;
		st,non-secure-otp;
	};
};

&cpu0{
	cpu-supply = <&vddcore>;
};

&cpu1{
	cpu-supply = <&vddcore>;
};

&pwr_regulators{
	vdd-supply = <&vdd>;
	vdd_3v3_usbfs-supply = <&vdd_usb>;
};

&rng1{
	status = "okay";
};

&rtc{
	status = "okay";
};
/* USER CODE END addons */

